LEUVEN (Belgium)— In the previously conducted symposia of VLSI Technology and Circuits, imec, a world-leading research and innovation hub in nanoelectronics and digital technologies, presents solutions that significantly improves the state of RAMs.
Imec has now solved two fundamental operation challenges which have so far limited the write speed and manufacturability of VCMA MRAMs, respectively.
The slow write operation relates to the unipolar nature of the VCMA MRAM device: the same polarity of write pulse is needed to transition from the parallel to the anti-parallel (P-AP) state as to switch from anti-parallel to parallel (AP-P) state.
For certain reasons, the memory cell needs to be pre-read before to know it's before writing, a sequence which significantly slows down the write operation.
Imec has introduced a unique deterministic VCMA write concept that avoids the need for pre-reading.
As a second improvement, imec embedded a magnetic hardmask on top of the magnetic tunnel junction. This eliminates the need for an external magnetic field during VCMA switching, improving the device’s manufacturability without degrading its performance.