Routing
The last major step to complete is a process of routing, which connects the already laid out nets and connects input gates with the I/O nets. In the routing step, you connect inputs and outputs by vias. Every foundry has a set of DRC rules that defines the route (also known as routing rules).
Routing rules contains:
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Specifying the routing layers.
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Specifying the minimum width and spacing rules.
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Specify the preferred routing direction for specific layers.
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Limiting the number of edges in the non-preferred routing direction.
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Defining via spacing rule for layer combination.
Routing is done in 3 stages. Global routing,Track assignment and Detail routing.
Global Routing
Global route cells are a small division each similar in size to a cell row in a grid abstraction. These smaller regions are known as GCELLs or buckets or something else in other tools. When routing depends on how much capacity the grid being routed, it will know the number of nets it can serve or that are in use it will know which cells or buckets are full while doing such global routing.
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Track Routing
By assigning actual track shapes and layer names to each net in each Gcell, the track routing tool creates nets that appear as if they are closed, but, they need to be closed up because of open segments.
Detail Routing
In detail the method will first fix all the open nets; and then go through each window knocking out routing DRCs, the way a routing tool would work at a window with incomplete routing; and then skip all the few larger boxes that are not DRCs and fixes already. This step of fixing windows and reducing DRCs are called Search and Repair.
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